Ok. Thanks.

On that note. I know we put effort into the vhdl register extraction and then came to the realization that there was much more information which needed to be provided, and providing all of that info was unrealistic.

I probably would have raised that question, about how much meta data about registers (rw mode, verify enable, etc) could be communicated....

I still think it would be worthwhile to be able to extract address, name and mode and be able to compare that against pyrogue and cpsw. We could at least then write a python script to verify that all registers are accounted for and are the correct size mode, etc.

-Ryan